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Probably
no other aspect of Fibre Channel has generated so much interest,
controversy, and discussion as has the Arbitrated Loop. What is
it? How does it work? Where will it be used? What can we expect
in the way of performance? These are the questions potential users
are asking -- but where do you go for the answers? If you've ever
tried reading the various standards documents, you've probably
found that they're frequently more confusing than helpful. Sure,
standards tell you what you can and can't do, but what about understanding
the hows and whys behind the standard?
This two-day seminar will familiarize you with Fibre Channel Arbitrated
Loop as it is described in the standard and then take you beyond
the standard to help you understand not only what Arbitrated Loop
is, but how it works and why specific decisions were made. You'll
go through detailed scenarios so you understand how Initialization,
Arbitration, Fairness, and Error handling work. You'll look at
typical command processing in order to understand each of the
steps involved. You'll look at detailed trace-level information
showing you exactly what is happening on the interface during
each of the key operations. You'll use the trace-level information
to model the performance of different loop configurations. When
you get back to work, you'll even find yourself taking the reference
manual with you to the lab to help solve that tough problem.
Course Outline (click for details)
-
What
is Arbitrated Loop?
| Details |
| |
Background |
| Arbitrated
Loop Applications |
| Configurations |
| Loop
vs. Other Fibre Channel |
| Topologies |
| Loop
Port Types |
| Loop
/Fabric hybrids |
-
Arbitrated
Loop Concepts
| Details |
| |
Repeater
function |
| Clock
elasticity |
| Loop
initialization |
| Loop
addressing |
| AL_PA
values |
| Participation/Non-participation |
| Public
vs. Private Loops |
| Classes
of Service |
| Arbitration |
| Ordered
Sets |
-
Loop
Initialization
| Details |
| |
Loop
Port State Machine |
| Selection of LI Master |
| LISM Sequence |
| AL_PA assignment |
| Positional Mapping |
| Hard addressing |
-
Loop
Operations
| Details |
| |
Fill
Word Substitution |
| Arbitration examples |
| Fairness |
| Prioritizing Loop Devices |
| Opening
a Loop circuit |
| Frame
Transmission |
| Closing
a Loop circuit |
| Command
scenarios |
-
Loop
Errors
| Details |
| |
Link
Errors |
| Frame
Errors |
| Sequence
Errors |
-
Arbitrated
Loop Hubs
| Details |
| |
Hub
Configurations |
| Hub Operation |
| Switched Hubs |
-
Loop
Robustness & Hot Swapping
| Details |
| |
Loop
Failure Modes |
| Identifying
the Failure Point |
| Loop
Resiliency Circuit |
| Dual-Porting
and Dual Loops |
| Arbitrated
Loop Active Hubs |
| Hot Swapping
Considerations |
-
Assessing
Loop Performance
-
Private
Loop Direct Attach
| Details |
| |
Why
PLDA? |
| FC-AL
feature set |
| FCP
feature set |
| SCSI Command sets |
Who
Should Attend
This seminar is designed for those who require an in-depth
knowledge of the Fibre Channel Arbitrated Loop. The intended
audience includes product architects, hardware, firmware,
software, and test engineers, as well as product planners,
managers, or others involved in the planning, implementation,
analysis, or testing of Fibre Channel Arbitrated Loop products. |
|
Prerequisites: Attendees should have a working knowledge
of Fibre Channel or have previously taken the "Comprehensive
Introduction to Fibre Channel" seminar. |
|
Course Length: 1 days |
Download course description (printable
version) |
|
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